For months, Apple has been fighting a battle to convince folks that megahertz (MHz) isn’t the ultimate benchmark in determining the speed of a computer. They haven’t made much headway, but they’re right. And in this series of articles, we’ll try to show you why.
Despite the popular perception, rating computer speeds by megahertz isn’t the same as comparing miles-per-hour (MPH) for automotive speed. MPH is a benchmark that can be applied equally to all moving vehicles. But in the world of PowerPC, Intel, AMD, and other chips, it’s not that simple. Comparing the megahertz of, say, a Pentium III chip to that of a PowerPC G4 simply doesn’t work well.
Still, it happens all the time. Call it “the myth of MHz.” MHz is merely one of the factors that determine speed. Others include:
The amount of time it takes data to get queued up and ready to go (this depends on the depth of the computer’s pipeline);
The amount of data that’s handled per clock cycle;
The rate at which the clock cycle is going.
It’s just the last one that concerns frequency or MHz. The first two involve the architecture of the computer chip itself. In other words, MHz is only part of the total equation. And tradeoffs can be made among the three performance related components so a computer doesn’t NECESSARILY gain more by having a higher clock frequency. The important factor is not so much how fast a chip can run, but how fast it can run effectively.
Megahertz is shorthand for one million cycles per second. It’s used to measure the transmission speed of electronic devices, including channels, buses, and the computer’s internal clock. For those who care, megahertz is generally equivalent to one million bits per second or to one million times some number of bits per second. When it refers to the computer’s clock, as in this article, it’s used to measure the speed of the central processing unit (CPU) of a computer.
But when you’re talking about the nitty-gritty, real-world performance of computers, there are a variety of factors that have to be considered. And when an architect is designing a microprocessor chip, he has to make certain decisions about how to achieve performance — and MHz is merely one of these decisions.
“MHz is generally achieved by making the pipeline — the term for the sequence of calculation units and the stages of those calculations — longer if you want to run faster,” said Peter N. Glaskowsky, analyst with the
Microprocessor Report, a resource for microprocessor information that regularly publishes performance information. “What this means is that each stage in the pipeline does a little bit less work, that there are more stages working at the same time.”
The “pipeline” is the sequence of calculation units and the stages of those calculations — and how it’s set up to work. Different chip manufacturers use different philosophies when it comes to the pipeline and how it’s set up to work.
PowerPC chips have shorter pipelines so each stage has a little more work to do. Some of them work in tandem on some chores, some work on different tasks simultaneously. The shorter pipeline in the G4 means it can tackle more instructions per cycle. In general, the PowerPC chips have shorter pipelines so each stage has a little more work to do, though some of them are working in parallel, in tandem, with each other. Some are working on different tasks at the same time.
The PowerPC reasoning is to do as much in as few computer cycles as possible. Intel stretches out its pipeline and splits it into smaller sections, using a scalable architecture. But when you stretch out the pipeline, the code has to be more efficient and software has to be optimized for it, according to Chris Cooksey, director of software engineering at
Intel chips have more stages than PowerPC chips. The Pentium 3 has about 10 stages and the Pentium 4 about 20 (though the amount of stages aren’t fixed because it depends on which instructions you’re running). This means, in the case of the Pentium 4, that about 20 different instructions are being processed. And for each of those instructions, only a fraction are actually being executed.
The stages include: fetching the data the instruction will use; decoding what operation the instruction will perform; the actual performance of the operation; and the writing of the results back to the processor.
“When you’re dealing with a longer pipeline, you’re doing more speculation about you’ll be doing a few cycles from now,” said David Reynolds, XLR8 product manager. “The processor could end up doing things that shouldn’t have been done because it’s speculating on what will happen several cycles from now.”
Sonnet’s director of engineering, said that the pipeline was somewhat like the assembly line in a factory. There’s not just one person on such a line; it’s broken up into stages with different folks.
“With a microprocessor, the number of stages it has before completing a task is a design variable,” Kannapell said. “Some have more, some less. The more stages the less work there is at each stage. However, if you increase the speed by twice as much and put in twice as many stages, it will still take the same amount of time. That’s what’s being done in the Wintel world. The stages have remained small in the PowerPC. That’s why a 733 MHz PowerPC performs better than a 1.2 or 1.5 GHz Pentium.”
To sum it up, Intel chips have more stages (fetching the data the instruction will use, decoding what operation the instruction will perform, the actual performance of the operation, and the writing of the results back to the processor) than PowerPC chips.
Tomorrow we’ll look at more differences between the Pentium and PowerPC chips.