Big Blue, after bucking computer industry trends with a profitable first quarter, yesterday released its next PowerPC roadmap. While making no specific product announcements in the new roadmap, IBM outlined which of their technologies will find their way into the PowerPC line and in which generation these technologies will be implemented. The previous roadmap’s last entry was the IBM 750CXe processor announced at last summer’s Embedded Processor Forum.
The items first on IBM’s list are DDR (Double Data Rate) RAM support and a 128-bit 166MHz Core Connect. The new roadmap also says that IBM will be moving from a .18-micron manufacturing process to a .13-micron SOI (Silicon On Insulator) manufacturing process.
For those less versed in processor technology, a smaller manufacturing process allows a processor to consume less energy, generate less heat and run faster. SOI is a technology where a small amount of material is placed under some of the connects of the transistors on a processor to make the individual transistors run more efficiently. Processors using SOI should consume even less energy and run cooler and faster as well. The roadmap says that this generation of processors will run up to 700MHz, although the current G3, the IBM 750CXe, is shipping at speeds of 500MHz to 700MHz.
Next on the horizon are IBM’s 1GHz+ processors. These will be manufactured using a Low-K Dielectric process at sizes of .13-micron to .1-micron. Low-K Dielectric is a technology where the insulating material between the copper wiring of a processor is specially selected and treated to reduce its capacitance. This means that there is less likelihood of one wire interfering with its neighbor on the processor by electric signals jumping the increasingly small gap between the wires as the manufacturing methods become smaller. This allows the processor to run at an even higher clock speed.
However, the roadmap suggests that more and more technologies for the embedded market will be incorporated into the PowerPC. Most notably among these is IBM’s RapidIO Interconnect architecture. This technology allows faster chip-to-chip and chip-to-board communications, features essential to any computer. But, RapidIO has been developed for and is being targeted to the high-performance embedded market. IBM’s leanings in this direction shouldn’t adversely affect desktop customers, most notably Apple, as IBM repeated that it’s strategic goal is to be core-based, power efficient, scalable and software transparent.
Another interesting tidbit is that later PowerPC processors from IBM will feature an integrated SIMD Engine. SIMD stands for Single Instruction, Multiple Data and is a common method of parallel processing used in mainframes. Intel implemented it own flavor of SIMD on its Pentium 3 and Pentium 4 processors to accelerate 3D applications.
IBM ends the roadmap with an entry for a 2GHz+ Enhanced PowerPC architecture with a new high-speed interface. The roadmap is dated 1999 through 200X and includes the entirety of the PowerPC line, from the fastest PowerPC processor to IBM’s system on a chip processors and low-power processors.
Two weeks ago, IBM met analyst’s expectations with a profit of US$1.75 billion for the first quarter, up 15 percent from the same quarter last year despite the softening computer industry. IBM’s hardware revenue increased 11 percent to $8.5 billion, but IBM’s CEO Louis V. Gerstner Jr. admitted that the company’s desktop segment was hurting. IBM’s hardware strength came from enterprise storage, shipments of electronic components to third-party manufacturers, UNIX servers and mainframes. The PowerPC is critical in all of these markets, and serves to underline why IBM’s strategic goals with the PowerPC are as they are.