Intel Corp.’s first dual-core chip was a hastily concocted design that was rushed out the door in hopes of beating rival Advanced Micro Devices Inc. (AMD) to the punch, an Intel engineer told attendees at the
With the realization that its single-core processors had hit a wall, Intel engineers plunged headlong into designing the Smithfield dual-core chip in 2004 but faced numerous challenges in getting that chip to market, said Jonathan Douglas, a principal engineer in Intel’s Digital Enterprise Group, which makes chips for office desktops and servers.
“We faced many challenges from taking a design team focused on making the highest performing processors possible to one focused on multicore designs,” Douglas said in a presentation on Intel’s Pentium D 800 series desktop chips and the forthcoming Paxville server chip, both of which are based on the Smithfield core.
Intel was unable to design a new memory bus in time for the dual-core chip, so it kept the same bus structure used by older Pentium 4 chips, Douglas said at the conference at Stanford University in Palo Alto, California. This bus was capable of supporting two separate single-core processors, but it was not as nearly as efficient as the dual-independent buses that will appear on the Paxville processors or the integrated memory controller used on AMD’s chips. The memory bus or front-side bus on Intel’s chips is used to connect the processor to memory.
All of Intel’s testing tools and processes had been designed for single-core chips, Douglas said. This meant that the company had to quickly come up with a new testing methodology for dual-core chips that could measure the connections between both cores.
Also, a new package had to be designed for the Pentium D chips that could accommodate both cores. “We’re putting two cores in one package, it’s like trying to fit into the pair of pants you saved from college,” Douglas said.
Intel would have preferred to design a package that would put two pieces of silicon in a single package, like the design that will be used for a future desktop chip called Presler, but its packaging team simply didn’t have time to get that in place for Smithfield, Douglas said.
The company’s Pentium D processors consist of two Pentium 4 cores placed closely together on a single silicon die. That design creates some problems in that dual-core processors must have some logic that coordinates the actions of both cores, and those transistors have to go somewhere in an already small package, Douglas said. This caused signaling problems that needed to be overcome, he said.
Intel also had to design special thermal diodes into the chip that would closely monitor the heat given off by the combination of two fast processor cores, Douglas said.
In total, Intel completed the Smithfield processor core in nine months, Douglas said. By Intel’s standards, that is an extremely aggressive goal for a major processor design, said Kevin Krewell, editor in chief of The Microprocessor Report in San Jose, California.
“Most designs take years,” Krewell said. “But it was very important for them to get back in the game and have a road map.”
Intel began to put together the Smithfield project around the time it publicly announced plans in May 2004 to cancel two future single-core designs and concentrate on multicore chips. The company realized that wringing more clock speed out of its single-core designs would require a significant engineering effort to deal with the excessive heat given off by those chips.
At the time, AMD had already started work on a dual-core version of its Opteron server processor that it would demonstrate in September of that year. AMD unveiled its dual-core Opteron chip in April, a few days after Intel launched Smithfield. AMD has since released dual-core desktop chips.
One reason for the aggressive schedule set for Smithfield was the need to respond to AMD’s actions, Douglas said, without mentioning his company’s competitor by name. “We needed a competitive response. We were behind,” he said.
Despite the rush, Smithfield was good enough to get Intel into the dual-core era, Krewell said. “It’s not an optimal solution, but it’s a viable solution. It works, and it works reasonably well,” he said.
Intel took a little more time designing the server version of Smithfield, known as Paxville, Douglas said. For instance, the company was able to address the bus inefficiencies by designing Paxville to use dual-independent front-side buses. Also, the more sophisticated package was available in time for Paxville, which helps reduce the chip’s power consumption, he said.
Paxville will be released ahead of schedule later this year in separate versions for two-way servers and for servers with four or more processors. Intel had originally expected to release the chip in 2006, but will get Paxville out the door in the second half of this year, it announced Monday. Another dual-core server processor, code-named Dempsey, will be released in the first quarter of 2006.
Future multicore designs will present additional challenges, Douglas said. Point-to-point buses and integrated memory controllers have been prominent features of other multicore designs, such as Opteron and the Cell processor. These designs help improve performance, but Intel isn’t necessarily sold on the concept because it requires a larger number of pins to deliver electricity into the processor and that can hurt yields, he said.